// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  vpc_cvdr_reg_nmanager_c_union_define.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1.0
// Date          :  2013/3/10
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V4.2 
// History       :  xxx 2018/03/19 14:37:49 Create file
// ******************************************************************************

#ifndef __VPC_CVDR_REG_NMANAGER_C_UNION_DEFINE_H__
#define __VPC_CVDR_REG_NMANAGER_C_UNION_DEFINE_H__

/* Define the union U_VPC_CVDR_CFG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_0                 : 3  ; /* [31:29] */
        unsigned int    max_axiwrite_id       : 5  ; /* [28:24] */
        unsigned int    rsv_1                 : 3  ; /* [23:21] */
        unsigned int    max_axiread_id        : 5  ; /* [20:16] */
        unsigned int    du_threshold_reached  : 8  ; /* [15:8] */
        unsigned int    rsv_2                 : 2  ; /* [7:6] */
        unsigned int    axiwrite_du_threshold : 6  ; /* [5:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_CVDR_CFG;

/* Define the union U_VPC_CVDR_DEBUG_EN */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_3      : 23  ; /* [31:9] */
        unsigned int    rd_peak_en : 1  ; /* [8] */
        unsigned int    rsv_4      : 7  ; /* [7:1] */
        unsigned int    wr_peak_en : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_CVDR_DEBUG_EN;

/* Define the union U_VPC_CVDR_DEBUG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_5   : 16  ; /* [31:16] */
        unsigned int    rd_peak : 8  ; /* [15:8] */
        unsigned int    wr_peak : 8  ; /* [7:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_CVDR_DEBUG;

/* Define the union U_VPC_CVDR_WR_QOS_CFG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    wr_qos_sr                 : 2  ; /* [31:30] */
        unsigned int    wr_qos_max                : 2  ; /* [29:28] */
        unsigned int    wr_qos_min                : 2  ; /* [27:26] */
        unsigned int    rsv_6                     : 2  ; /* [25:24] */
        unsigned int    wr_qos_threshold_11_start : 4  ; /* [23:20] */
        unsigned int    wr_qos_threshold_11_stop  : 4  ; /* [19:16] */
        unsigned int    wr_qos_threshold_10_start : 4  ; /* [15:12] */
        unsigned int    wr_qos_threshold_10_stop  : 4  ; /* [11:8] */
        unsigned int    wr_qos_threshold_01_start : 4  ; /* [7:4] */
        unsigned int    wr_qos_threshold_01_stop  : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_CVDR_WR_QOS_CFG;

/* Define the union U_VPC_CVDR_RD_QOS_CFG */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rd_qos_sr                 : 2  ; /* [31:30] */
        unsigned int    rd_qos_max                : 2  ; /* [29:28] */
        unsigned int    rd_qos_min                : 2  ; /* [27:26] */
        unsigned int    rsv_7                     : 2  ; /* [25:24] */
        unsigned int    rd_qos_threshold_11_start : 4  ; /* [23:20] */
        unsigned int    rd_qos_threshold_11_stop  : 4  ; /* [19:16] */
        unsigned int    rd_qos_threshold_10_start : 4  ; /* [15:12] */
        unsigned int    rd_qos_threshold_10_stop  : 4  ; /* [11:8] */
        unsigned int    rd_qos_threshold_01_start : 4  ; /* [7:4] */
        unsigned int    rd_qos_threshold_01_stop  : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_CVDR_RD_QOS_CFG;

/* Define the union U_VPC_FORCE_CLK */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_8               : 23  ; /* [31:9] */
        unsigned int    force_cfg_clk_on    : 1  ; /* [8] */
        unsigned int    force_du_wr_clk_on  : 1  ; /* [7] */
        unsigned int    force_du_rd_clk_on  : 1  ; /* [6] */
        unsigned int    force_axi_wr_clk_on : 1  ; /* [5] */
        unsigned int    force_axi_rd_clk_on : 1  ; /* [4] */
        unsigned int    force_nrwr_clk_on   : 1  ; /* [3] */
        unsigned int    force_nrrd_clk_on   : 1  ; /* [2] */
        unsigned int    force_vpwr_clk_on   : 1  ; /* [1] */
        unsigned int    force_vprd_clk_on   : 1  ; /* [0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_FORCE_CLK;

/* Define the union U_VPC_OTHER_RO */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    other_ro : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_OTHER_RO;

/* Define the union U_VPC_OTHER_RW */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    other_rw : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_OTHER_RW;

/* Define the union U_VPC_VP_WR_CFG_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_last_page_0       : 19  ; /* [31:13] */
        unsigned int    rsv_9                  : 8  ; /* [12:5] */
        unsigned int    vpwr_pixel_expansion_0 : 1  ; /* [4] */
        unsigned int    vpwr_pixel_format_0    : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_CFG_0;

/* Define the union U_VPC_VP_WR_AXI_FS_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_address_frame_start_0 : 30  ; /* [31:2] */
        unsigned int    rsv_10                     : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_AXI_FS_0;

/* Define the union U_VPC_VP_WR_AXI_LINE_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_11             : 3  ; /* [31:29] */
        unsigned int    vpwr_line_wrap_0   : 14  ; /* [28:15] */
        unsigned int    rsv_12             : 5  ; /* [14:10] */
        unsigned int    vpwr_line_stride_0 : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_AXI_LINE_0;

/* Define the union U_VPC_VP_WR_IF_CFG_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_prefetch_bypass_0                   : 1  ; /* [31] */
        unsigned int    rsv_13                                   : 5  ; /* [30:26] */
        unsigned int    vp_wr_stop_0                             : 1  ; /* [25] */
        unsigned int    vp_wr_stop_ok_0                          : 1  ; /* [24] */
        unsigned int    rsv_14                                   : 5  ; /* [23:19] */
        unsigned int    vp_wr_stop_enable_pressure_0             : 1  ; /* [18] */
        unsigned int    vp_wr_stop_enable_flux_ctrl_0            : 1  ; /* [17] */
        unsigned int    vp_wr_stop_enable_du_threshold_reached_0 : 1  ; /* [16] */
        unsigned int    rsv_15                                   : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_IF_CFG_0;

/* Define the union U_VPC_VP_WR_CFG_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_last_page_1       : 19  ; /* [31:13] */
        unsigned int    rsv_16                 : 8  ; /* [12:5] */
        unsigned int    vpwr_pixel_expansion_1 : 1  ; /* [4] */
        unsigned int    vpwr_pixel_format_1    : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_CFG_1;

/* Define the union U_VPC_VP_WR_AXI_FS_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_address_frame_start_1 : 30  ; /* [31:2] */
        unsigned int    rsv_17                     : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_AXI_FS_1;

/* Define the union U_VPC_VP_WR_AXI_LINE_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_18             : 3  ; /* [31:29] */
        unsigned int    vpwr_line_wrap_1   : 14  ; /* [28:15] */
        unsigned int    rsv_19             : 5  ; /* [14:10] */
        unsigned int    vpwr_line_stride_1 : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_AXI_LINE_1;

/* Define the union U_VPC_VP_WR_IF_CFG_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_prefetch_bypass_1                   : 1  ; /* [31] */
        unsigned int    rsv_20                                   : 5  ; /* [30:26] */
        unsigned int    vp_wr_stop_1                             : 1  ; /* [25] */
        unsigned int    vp_wr_stop_ok_1                          : 1  ; /* [24] */
        unsigned int    rsv_21                                   : 5  ; /* [23:19] */
        unsigned int    vp_wr_stop_enable_pressure_1             : 1  ; /* [18] */
        unsigned int    vp_wr_stop_enable_flux_ctrl_1            : 1  ; /* [17] */
        unsigned int    vp_wr_stop_enable_du_threshold_reached_1 : 1  ; /* [16] */
        unsigned int    rsv_22                                   : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_IF_CFG_1;

/* Define the union U_VPC_VP_WR_CFG_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_last_page_2       : 19  ; /* [31:13] */
        unsigned int    rsv_23                 : 8  ; /* [12:5] */
        unsigned int    vpwr_pixel_expansion_2 : 1  ; /* [4] */
        unsigned int    vpwr_pixel_format_2    : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_CFG_2;

/* Define the union U_VPC_VP_WR_AXI_FS_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_address_frame_start_2 : 30  ; /* [31:2] */
        unsigned int    rsv_24                     : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_AXI_FS_2;

/* Define the union U_VPC_VP_WR_AXI_LINE_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_25             : 3  ; /* [31:29] */
        unsigned int    vpwr_line_wrap_2   : 14  ; /* [28:15] */
        unsigned int    rsv_26             : 5  ; /* [14:10] */
        unsigned int    vpwr_line_stride_2 : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_AXI_LINE_2;

/* Define the union U_VPC_VP_WR_IF_CFG_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_prefetch_bypass_2                   : 1  ; /* [31] */
        unsigned int    rsv_27                                   : 5  ; /* [30:26] */
        unsigned int    vp_wr_stop_2                             : 1  ; /* [25] */
        unsigned int    vp_wr_stop_ok_2                          : 1  ; /* [24] */
        unsigned int    rsv_28                                   : 5  ; /* [23:19] */
        unsigned int    vp_wr_stop_enable_pressure_2             : 1  ; /* [18] */
        unsigned int    vp_wr_stop_enable_flux_ctrl_2            : 1  ; /* [17] */
        unsigned int    vp_wr_stop_enable_du_threshold_reached_2 : 1  ; /* [16] */
        unsigned int    rsv_29                                   : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_IF_CFG_2;

/* Define the union U_VPC_VP_WR_CFG_3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_last_page_3       : 19  ; /* [31:13] */
        unsigned int    rsv_30                 : 8  ; /* [12:5] */
        unsigned int    vpwr_pixel_expansion_3 : 1  ; /* [4] */
        unsigned int    vpwr_pixel_format_3    : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_CFG_3;

/* Define the union U_VPC_VP_WR_AXI_FS_3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_address_frame_start_3 : 30  ; /* [31:2] */
        unsigned int    rsv_31                     : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_AXI_FS_3;

/* Define the union U_VPC_VP_WR_AXI_LINE_3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_32             : 3  ; /* [31:29] */
        unsigned int    vpwr_line_wrap_3   : 14  ; /* [28:15] */
        unsigned int    rsv_33             : 5  ; /* [14:10] */
        unsigned int    vpwr_line_stride_3 : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_AXI_LINE_3;

/* Define the union U_VPC_VP_WR_IF_CFG_3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_prefetch_bypass_3                   : 1  ; /* [31] */
        unsigned int    rsv_34                                   : 5  ; /* [30:26] */
        unsigned int    vp_wr_stop_3                             : 1  ; /* [25] */
        unsigned int    vp_wr_stop_ok_3                          : 1  ; /* [24] */
        unsigned int    rsv_35                                   : 5  ; /* [23:19] */
        unsigned int    vp_wr_stop_enable_pressure_3             : 1  ; /* [18] */
        unsigned int    vp_wr_stop_enable_flux_ctrl_3            : 1  ; /* [17] */
        unsigned int    vp_wr_stop_enable_du_threshold_reached_3 : 1  ; /* [16] */
        unsigned int    rsv_36                                   : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_IF_CFG_3;

/* Define the union U_VPC_VP_WR_CFG_4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_last_page_4       : 19  ; /* [31:13] */
        unsigned int    rsv_37                 : 8  ; /* [12:5] */
        unsigned int    vpwr_pixel_expansion_4 : 1  ; /* [4] */
        unsigned int    vpwr_pixel_format_4    : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_CFG_4;

/* Define the union U_VPC_VP_WR_AXI_FS_4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_address_frame_start_4 : 30  ; /* [31:2] */
        unsigned int    rsv_38                     : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_AXI_FS_4;

/* Define the union U_VPC_VP_WR_AXI_LINE_4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_39             : 3  ; /* [31:29] */
        unsigned int    vpwr_line_wrap_4   : 14  ; /* [28:15] */
        unsigned int    rsv_40             : 5  ; /* [14:10] */
        unsigned int    vpwr_line_stride_4 : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_AXI_LINE_4;

/* Define the union U_VPC_VP_WR_IF_CFG_4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vpwr_prefetch_bypass_4                   : 1  ; /* [31] */
        unsigned int    rsv_41                                   : 5  ; /* [30:26] */
        unsigned int    vp_wr_stop_4                             : 1  ; /* [25] */
        unsigned int    vp_wr_stop_ok_4                          : 1  ; /* [24] */
        unsigned int    rsv_42                                   : 5  ; /* [23:19] */
        unsigned int    vp_wr_stop_enable_pressure_4             : 1  ; /* [18] */
        unsigned int    vp_wr_stop_enable_flux_ctrl_4            : 1  ; /* [17] */
        unsigned int    vp_wr_stop_enable_du_threshold_reached_4 : 1  ; /* [16] */
        unsigned int    rsv_43                                   : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_IF_CFG_4;

/* Define the union U_VPC_LIMITER_VP_WR_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_44                       : 4  ; /* [31:28] */
        unsigned int    vpwr_access_limiter_reload_0 : 4  ; /* [27:24] */
        unsigned int    rsv_45                       : 8  ; /* [23:16] */
        unsigned int    vpwr_access_limiter_3_0      : 4  ; /* [15:12] */
        unsigned int    vpwr_access_limiter_2_0      : 4  ; /* [11:8] */
        unsigned int    vpwr_access_limiter_1_0      : 4  ; /* [7:4] */
        unsigned int    vpwr_access_limiter_0_0      : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_LIMITER_VP_WR_0;

/* Define the union U_VPC_LIMITER_VP_WR_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_46                       : 4  ; /* [31:28] */
        unsigned int    vpwr_access_limiter_reload_1 : 4  ; /* [27:24] */
        unsigned int    rsv_47                       : 8  ; /* [23:16] */
        unsigned int    vpwr_access_limiter_3_1      : 4  ; /* [15:12] */
        unsigned int    vpwr_access_limiter_2_1      : 4  ; /* [11:8] */
        unsigned int    vpwr_access_limiter_1_1      : 4  ; /* [7:4] */
        unsigned int    vpwr_access_limiter_0_1      : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_LIMITER_VP_WR_1;

/* Define the union U_VPC_LIMITER_VP_WR_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_48                       : 4  ; /* [31:28] */
        unsigned int    vpwr_access_limiter_reload_2 : 4  ; /* [27:24] */
        unsigned int    rsv_49                       : 8  ; /* [23:16] */
        unsigned int    vpwr_access_limiter_3_2      : 4  ; /* [15:12] */
        unsigned int    vpwr_access_limiter_2_2      : 4  ; /* [11:8] */
        unsigned int    vpwr_access_limiter_1_2      : 4  ; /* [7:4] */
        unsigned int    vpwr_access_limiter_0_2      : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_LIMITER_VP_WR_2;

/* Define the union U_VPC_LIMITER_VP_WR_3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_50                       : 4  ; /* [31:28] */
        unsigned int    vpwr_access_limiter_reload_3 : 4  ; /* [27:24] */
        unsigned int    rsv_51                       : 8  ; /* [23:16] */
        unsigned int    vpwr_access_limiter_3_3      : 4  ; /* [15:12] */
        unsigned int    vpwr_access_limiter_2_3      : 4  ; /* [11:8] */
        unsigned int    vpwr_access_limiter_1_3      : 4  ; /* [7:4] */
        unsigned int    vpwr_access_limiter_0_3      : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_LIMITER_VP_WR_3;

/* Define the union U_VPC_LIMITER_VP_WR_4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_52                       : 4  ; /* [31:28] */
        unsigned int    vpwr_access_limiter_reload_4 : 4  ; /* [27:24] */
        unsigned int    rsv_53                       : 8  ; /* [23:16] */
        unsigned int    vpwr_access_limiter_3_4      : 4  ; /* [15:12] */
        unsigned int    vpwr_access_limiter_2_4      : 4  ; /* [11:8] */
        unsigned int    vpwr_access_limiter_1_4      : 4  ; /* [7:4] */
        unsigned int    vpwr_access_limiter_0_4      : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_LIMITER_VP_WR_4;

/* Define the union U_VPC_VP_RD_CFG_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vprd_last_page_0       : 19  ; /* [31:13] */
        unsigned int    rsv_54                 : 3  ; /* [12:10] */
        unsigned int    vprd_allocated_du_0    : 5  ; /* [9:5] */
        unsigned int    vprd_pixel_expansion_0 : 1  ; /* [4] */
        unsigned int    vprd_pixel_format_0    : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_CFG_0;

/* Define the union U_VPC_VP_RD_LWG_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_55                     : 8  ; /* [31:24] */
        unsigned int    vprd_horizontal_blanking_0 : 8  ; /* [23:16] */
        unsigned int    rsv_56                     : 3  ; /* [15:13] */
        unsigned int    vprd_line_size_0           : 13  ; /* [12:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_LWG_0;

/* Define the union U_VPC_VP_RD_FHG_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_57                   : 8  ; /* [31:24] */
        unsigned int    vprd_vertical_blanking_0 : 8  ; /* [23:16] */
        unsigned int    rsv_58                   : 3  ; /* [15:13] */
        unsigned int    vprd_frame_size_0        : 13  ; /* [12:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_FHG_0;

/* Define the union U_VPC_VP_RD_AXI_FS_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vprd_axi_frame_start_0 : 30  ; /* [31:2] */
        unsigned int    rsv_59                 : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_AXI_FS_0;

/* Define the union U_VPC_VP_RD_AXI_LINE_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_60             : 3  ; /* [31:29] */
        unsigned int    vprd_line_wrap_0   : 13  ; /* [28:16] */
        unsigned int    rsv_61             : 6  ; /* [15:10] */
        unsigned int    vprd_line_stride_0 : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_AXI_LINE_0;

/* Define the union U_VPC_VP_RD_IF_CFG_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vprd_prefetch_bypass_0                   : 1  ; /* [31] */
        unsigned int    rsv_62                                   : 5  ; /* [30:26] */
        unsigned int    vp_rd_stop_0                             : 1  ; /* [25] */
        unsigned int    vp_rd_stop_ok_0                          : 1  ; /* [24] */
        unsigned int    rsv_63                                   : 5  ; /* [23:19] */
        unsigned int    vp_rd_stop_enable_pressure_0             : 1  ; /* [18] */
        unsigned int    vp_rd_stop_enable_flux_ctrl_0            : 1  ; /* [17] */
        unsigned int    vp_rd_stop_enable_du_threshold_reached_0 : 1  ; /* [16] */
        unsigned int    rsv_64                                   : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_IF_CFG_0;

/* Define the union U_VPC_VP_RD_DEBUG_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vp_rd_debug_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_DEBUG_0;

/* Define the union U_VPC_VP_RD_CFG_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vprd_last_page_1       : 19  ; /* [31:13] */
        unsigned int    rsv_65                 : 3  ; /* [12:10] */
        unsigned int    vprd_allocated_du_1    : 5  ; /* [9:5] */
        unsigned int    vprd_pixel_expansion_1 : 1  ; /* [4] */
        unsigned int    vprd_pixel_format_1    : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_CFG_1;

/* Define the union U_VPC_VP_RD_LWG_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_66                     : 8  ; /* [31:24] */
        unsigned int    vprd_horizontal_blanking_1 : 8  ; /* [23:16] */
        unsigned int    rsv_67                     : 3  ; /* [15:13] */
        unsigned int    vprd_line_size_1           : 13  ; /* [12:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_LWG_1;

/* Define the union U_VPC_VP_RD_FHG_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_68                   : 8  ; /* [31:24] */
        unsigned int    vprd_vertical_blanking_1 : 8  ; /* [23:16] */
        unsigned int    rsv_69                   : 3  ; /* [15:13] */
        unsigned int    vprd_frame_size_1        : 13  ; /* [12:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_FHG_1;

/* Define the union U_VPC_VP_RD_AXI_FS_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vprd_axi_frame_start_1 : 30  ; /* [31:2] */
        unsigned int    rsv_70                 : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_AXI_FS_1;

/* Define the union U_VPC_VP_RD_AXI_LINE_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_71             : 3  ; /* [31:29] */
        unsigned int    vprd_line_wrap_1   : 13  ; /* [28:16] */
        unsigned int    rsv_72             : 6  ; /* [15:10] */
        unsigned int    vprd_line_stride_1 : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_AXI_LINE_1;

/* Define the union U_VPC_VP_RD_IF_CFG_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vprd_prefetch_bypass_1                   : 1  ; /* [31] */
        unsigned int    rsv_73                                   : 5  ; /* [30:26] */
        unsigned int    vp_rd_stop_1                             : 1  ; /* [25] */
        unsigned int    vp_rd_stop_ok_1                          : 1  ; /* [24] */
        unsigned int    rsv_74                                   : 5  ; /* [23:19] */
        unsigned int    vp_rd_stop_enable_pressure_1             : 1  ; /* [18] */
        unsigned int    vp_rd_stop_enable_flux_ctrl_1            : 1  ; /* [17] */
        unsigned int    vp_rd_stop_enable_du_threshold_reached_1 : 1  ; /* [16] */
        unsigned int    rsv_75                                   : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_IF_CFG_1;

/* Define the union U_VPC_VP_RD_DEBUG_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vp_rd_debug_1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_DEBUG_1;

/* Define the union U_VPC_VP_RD_CFG_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vprd_last_page_2       : 19  ; /* [31:13] */
        unsigned int    rsv_76                 : 3  ; /* [12:10] */
        unsigned int    vprd_allocated_du_2    : 5  ; /* [9:5] */
        unsigned int    vprd_pixel_expansion_2 : 1  ; /* [4] */
        unsigned int    vprd_pixel_format_2    : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_CFG_2;

/* Define the union U_VPC_VP_RD_LWG_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_77                     : 8  ; /* [31:24] */
        unsigned int    vprd_horizontal_blanking_2 : 8  ; /* [23:16] */
        unsigned int    rsv_78                     : 3  ; /* [15:13] */
        unsigned int    vprd_line_size_2           : 13  ; /* [12:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_LWG_2;

/* Define the union U_VPC_VP_RD_FHG_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_79                   : 8  ; /* [31:24] */
        unsigned int    vprd_vertical_blanking_2 : 8  ; /* [23:16] */
        unsigned int    rsv_80                   : 3  ; /* [15:13] */
        unsigned int    vprd_frame_size_2        : 13  ; /* [12:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_FHG_2;

/* Define the union U_VPC_VP_RD_AXI_FS_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vprd_axi_frame_start_2 : 30  ; /* [31:2] */
        unsigned int    rsv_81                 : 2  ; /* [1:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_AXI_FS_2;

/* Define the union U_VPC_VP_RD_AXI_LINE_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_82             : 3  ; /* [31:29] */
        unsigned int    vprd_line_wrap_2   : 13  ; /* [28:16] */
        unsigned int    rsv_83             : 6  ; /* [15:10] */
        unsigned int    vprd_line_stride_2 : 10  ; /* [9:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_AXI_LINE_2;

/* Define the union U_VPC_VP_RD_IF_CFG_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vprd_prefetch_bypass_2                   : 1  ; /* [31] */
        unsigned int    rsv_84                                   : 5  ; /* [30:26] */
        unsigned int    vp_rd_stop_2                             : 1  ; /* [25] */
        unsigned int    vp_rd_stop_ok_2                          : 1  ; /* [24] */
        unsigned int    rsv_85                                   : 5  ; /* [23:19] */
        unsigned int    vp_rd_stop_enable_pressure_2             : 1  ; /* [18] */
        unsigned int    vp_rd_stop_enable_flux_ctrl_2            : 1  ; /* [17] */
        unsigned int    vp_rd_stop_enable_du_threshold_reached_2 : 1  ; /* [16] */
        unsigned int    rsv_86                                   : 16  ; /* [15:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_IF_CFG_2;

/* Define the union U_VPC_VP_RD_DEBUG_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vp_rd_debug_2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_RD_DEBUG_2;

/* Define the union U_VPC_LIMITER_VP_RD_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_87                       : 4  ; /* [31:28] */
        unsigned int    vprd_access_limiter_reload_0 : 4  ; /* [27:24] */
        unsigned int    rsv_88                       : 8  ; /* [23:16] */
        unsigned int    vprd_access_limiter_3_0      : 4  ; /* [15:12] */
        unsigned int    vprd_access_limiter_2_0      : 4  ; /* [11:8] */
        unsigned int    vprd_access_limiter_1_0      : 4  ; /* [7:4] */
        unsigned int    vprd_access_limiter_0_0      : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_LIMITER_VP_RD_0;

/* Define the union U_VPC_LIMITER_VP_RD_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_89                       : 4  ; /* [31:28] */
        unsigned int    vprd_access_limiter_reload_1 : 4  ; /* [27:24] */
        unsigned int    rsv_90                       : 8  ; /* [23:16] */
        unsigned int    vprd_access_limiter_3_1      : 4  ; /* [15:12] */
        unsigned int    vprd_access_limiter_2_1      : 4  ; /* [11:8] */
        unsigned int    vprd_access_limiter_1_1      : 4  ; /* [7:4] */
        unsigned int    vprd_access_limiter_0_1      : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_LIMITER_VP_RD_1;

/* Define the union U_VPC_LIMITER_VP_RD_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    rsv_91                       : 4  ; /* [31:28] */
        unsigned int    vprd_access_limiter_reload_2 : 4  ; /* [27:24] */
        unsigned int    rsv_92                       : 8  ; /* [23:16] */
        unsigned int    vprd_access_limiter_3_2      : 4  ; /* [15:12] */
        unsigned int    vprd_access_limiter_2_2      : 4  ; /* [11:8] */
        unsigned int    vprd_access_limiter_1_2      : 4  ; /* [7:4] */
        unsigned int    vprd_access_limiter_0_2      : 4  ; /* [3:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_LIMITER_VP_RD_2;

/* Define the union U_VPC_SPARE_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    spare_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_SPARE_0;

/* Define the union U_VPC_SPARE_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    spare_1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_SPARE_1;

/* Define the union U_VPC_SPARE_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    spare_2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_SPARE_2;

/* Define the union U_VPC_SPARE_3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    spare_3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_SPARE_3;

/* Define the union U_VPC_VP_WR_DEBUG_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vp_wr_debug_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_DEBUG_0;

/* Define the union U_VPC_VP_WR_DEBUG_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vp_wr_debug_1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_DEBUG_1;

/* Define the union U_VPC_VP_WR_DEBUG_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vp_wr_debug_2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_DEBUG_2;

/* Define the union U_VPC_VP_WR_DEBUG_3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vp_wr_debug_3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_DEBUG_3;

/* Define the union U_VPC_VP_WR_DEBUG_4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    vp_wr_debug_4 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_VP_WR_DEBUG_4;

/* Define the union U_VPC_DEBUG_0 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_0;

/* Define the union U_VPC_DEBUG_1 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_1;

/* Define the union U_VPC_DEBUG_2 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_2;

/* Define the union U_VPC_DEBUG_3 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_3;

/* Define the union U_VPC_DEBUG_4 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_4 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_4;

/* Define the union U_VPC_DEBUG_5 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_5 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_5;

/* Define the union U_VPC_DEBUG_6 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_6 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_6;

/* Define the union U_VPC_DEBUG_7 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_7 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_7;

/* Define the union U_VPC_DEBUG_8 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_8 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_8;

/* Define the union U_VPC_DEBUG_9 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_9 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_9;

/* Define the union U_VPC_DEBUG_10 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_10 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_10;

/* Define the union U_VPC_DEBUG_11 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_11 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_11;

/* Define the union U_VPC_DEBUG_12 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_12 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_12;

/* Define the union U_VPC_DEBUG_13 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_13 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_13;

/* Define the union U_VPC_DEBUG_14 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_14 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_14;

/* Define the union U_VPC_DEBUG_15 */
typedef union
{
    /* Define the struct bits */
    struct
    {
        unsigned int    debug_15 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    unsigned int    u32;

} U_VPC_DEBUG_15;


//==============================================================================
/* Define the global struct */
typedef struct
{
    volatile U_VPC_CVDR_CFG         VPC_CVDR_CFG         ; /* 0 */
    volatile U_VPC_CVDR_DEBUG_EN    VPC_CVDR_DEBUG_EN    ; /* 4 */
    volatile U_VPC_CVDR_DEBUG       VPC_CVDR_DEBUG       ; /* 8 */
    volatile U_VPC_CVDR_WR_QOS_CFG  VPC_CVDR_WR_QOS_CFG  ; /* C */
    volatile U_VPC_CVDR_RD_QOS_CFG  VPC_CVDR_RD_QOS_CFG  ; /* 10 */
    volatile U_VPC_FORCE_CLK        VPC_FORCE_CLK        ; /* 14 */
    volatile U_VPC_OTHER_RO         VPC_OTHER_RO         ; /* 20 */
    volatile U_VPC_OTHER_RW         VPC_OTHER_RW         ; /* 24 */
    volatile U_VPC_VP_WR_CFG_0      VPC_VP_WR_CFG_0      ; /* 30 */
    volatile U_VPC_VP_WR_AXI_FS_0   VPC_VP_WR_AXI_FS_0   ; /* 34 */
    volatile U_VPC_VP_WR_AXI_LINE_0 VPC_VP_WR_AXI_LINE_0 ; /* 38 */
    volatile U_VPC_VP_WR_IF_CFG_0   VPC_VP_WR_IF_CFG_0   ; /* 3C */
    volatile U_VPC_VP_WR_CFG_1      VPC_VP_WR_CFG_1      ; /* 40 */
    volatile U_VPC_VP_WR_AXI_FS_1   VPC_VP_WR_AXI_FS_1   ; /* 44 */
    volatile U_VPC_VP_WR_AXI_LINE_1 VPC_VP_WR_AXI_LINE_1 ; /* 48 */
    volatile U_VPC_VP_WR_IF_CFG_1   VPC_VP_WR_IF_CFG_1   ; /* 4C */
    volatile U_VPC_VP_WR_CFG_2      VPC_VP_WR_CFG_2      ; /* 50 */
    volatile U_VPC_VP_WR_AXI_FS_2   VPC_VP_WR_AXI_FS_2   ; /* 54 */
    volatile U_VPC_VP_WR_AXI_LINE_2 VPC_VP_WR_AXI_LINE_2 ; /* 58 */
    volatile U_VPC_VP_WR_IF_CFG_2   VPC_VP_WR_IF_CFG_2   ; /* 5C */
    volatile U_VPC_VP_WR_CFG_3      VPC_VP_WR_CFG_3      ; /* 60 */
    volatile U_VPC_VP_WR_AXI_FS_3   VPC_VP_WR_AXI_FS_3   ; /* 64 */
    volatile U_VPC_VP_WR_AXI_LINE_3 VPC_VP_WR_AXI_LINE_3 ; /* 68 */
    volatile U_VPC_VP_WR_IF_CFG_3   VPC_VP_WR_IF_CFG_3   ; /* 6C */
    volatile U_VPC_VP_WR_CFG_4      VPC_VP_WR_CFG_4      ; /* 70 */
    volatile U_VPC_VP_WR_AXI_FS_4   VPC_VP_WR_AXI_FS_4   ; /* 74 */
    volatile U_VPC_VP_WR_AXI_LINE_4 VPC_VP_WR_AXI_LINE_4 ; /* 78 */
    volatile U_VPC_VP_WR_IF_CFG_4   VPC_VP_WR_IF_CFG_4   ; /* 7C */
    volatile U_VPC_LIMITER_VP_WR_0  VPC_LIMITER_VP_WR_0  ; /* 830 */
    volatile U_VPC_LIMITER_VP_WR_1  VPC_LIMITER_VP_WR_1  ; /* 834 */
    volatile U_VPC_LIMITER_VP_WR_2  VPC_LIMITER_VP_WR_2  ; /* 838 */
    volatile U_VPC_LIMITER_VP_WR_3  VPC_LIMITER_VP_WR_3  ; /* 83C */
    volatile U_VPC_LIMITER_VP_WR_4  VPC_LIMITER_VP_WR_4  ; /* 840 */
    volatile U_VPC_VP_RD_CFG_0      VPC_VP_RD_CFG_0      ; /* A30 */
    volatile U_VPC_VP_RD_LWG_0      VPC_VP_RD_LWG_0      ; /* A34 */
    volatile U_VPC_VP_RD_FHG_0      VPC_VP_RD_FHG_0      ; /* A38 */
    volatile U_VPC_VP_RD_AXI_FS_0   VPC_VP_RD_AXI_FS_0   ; /* A3C */
    volatile U_VPC_VP_RD_AXI_LINE_0 VPC_VP_RD_AXI_LINE_0 ; /* A40 */
    volatile U_VPC_VP_RD_IF_CFG_0   VPC_VP_RD_IF_CFG_0   ; /* A44 */
    volatile U_VPC_VP_RD_DEBUG_0    VPC_VP_RD_DEBUG_0    ; /* A4C */
    volatile U_VPC_VP_RD_CFG_1      VPC_VP_RD_CFG_1      ; /* A50 */
    volatile U_VPC_VP_RD_LWG_1      VPC_VP_RD_LWG_1      ; /* A54 */
    volatile U_VPC_VP_RD_FHG_1      VPC_VP_RD_FHG_1      ; /* A58 */
    volatile U_VPC_VP_RD_AXI_FS_1   VPC_VP_RD_AXI_FS_1   ; /* A5C */
    volatile U_VPC_VP_RD_AXI_LINE_1 VPC_VP_RD_AXI_LINE_1 ; /* A60 */
    volatile U_VPC_VP_RD_IF_CFG_1   VPC_VP_RD_IF_CFG_1   ; /* A64 */
    volatile U_VPC_VP_RD_DEBUG_1    VPC_VP_RD_DEBUG_1    ; /* A6C */
    volatile U_VPC_VP_RD_CFG_2      VPC_VP_RD_CFG_2      ; /* A70 */
    volatile U_VPC_VP_RD_LWG_2      VPC_VP_RD_LWG_2      ; /* A74 */
    volatile U_VPC_VP_RD_FHG_2      VPC_VP_RD_FHG_2      ; /* A78 */
    volatile U_VPC_VP_RD_AXI_FS_2   VPC_VP_RD_AXI_FS_2   ; /* A7C */
    volatile U_VPC_VP_RD_AXI_LINE_2 VPC_VP_RD_AXI_LINE_2 ; /* A80 */
    volatile U_VPC_VP_RD_IF_CFG_2   VPC_VP_RD_IF_CFG_2   ; /* A84 */
    volatile U_VPC_VP_RD_DEBUG_2    VPC_VP_RD_DEBUG_2    ; /* A8C */
    volatile U_VPC_LIMITER_VP_RD_0  VPC_LIMITER_VP_RD_0  ; /* 1230 */
    volatile U_VPC_LIMITER_VP_RD_1  VPC_LIMITER_VP_RD_1  ; /* 1234 */
    volatile U_VPC_LIMITER_VP_RD_2  VPC_LIMITER_VP_RD_2  ; /* 1238 */
    volatile U_VPC_SPARE_0          VPC_SPARE_0          ; /* 1D30 */
    volatile U_VPC_SPARE_1          VPC_SPARE_1          ; /* 1D34 */
    volatile U_VPC_SPARE_2          VPC_SPARE_2          ; /* 1D38 */
    volatile U_VPC_SPARE_3          VPC_SPARE_3          ; /* 1D3C */
    volatile U_VPC_VP_WR_DEBUG_0    VPC_VP_WR_DEBUG_0    ; /* 1D40 */
    volatile U_VPC_VP_WR_DEBUG_1    VPC_VP_WR_DEBUG_1    ; /* 1D44 */
    volatile U_VPC_VP_WR_DEBUG_2    VPC_VP_WR_DEBUG_2    ; /* 1D48 */
    volatile U_VPC_VP_WR_DEBUG_3    VPC_VP_WR_DEBUG_3    ; /* 1D4C */
    volatile U_VPC_VP_WR_DEBUG_4    VPC_VP_WR_DEBUG_4    ; /* 1D50 */
    volatile U_VPC_DEBUG_0          VPC_DEBUG_0          ; /* 1F40 */
    volatile U_VPC_DEBUG_1          VPC_DEBUG_1          ; /* 1F44 */
    volatile U_VPC_DEBUG_2          VPC_DEBUG_2          ; /* 1F48 */
    volatile U_VPC_DEBUG_3          VPC_DEBUG_3          ; /* 1F4C */
    volatile U_VPC_DEBUG_4          VPC_DEBUG_4          ; /* 1F50 */
    volatile U_VPC_DEBUG_5          VPC_DEBUG_5          ; /* 1F54 */
    volatile U_VPC_DEBUG_6          VPC_DEBUG_6          ; /* 1F58 */
    volatile U_VPC_DEBUG_7          VPC_DEBUG_7          ; /* 1F5C */
    volatile U_VPC_DEBUG_8          VPC_DEBUG_8          ; /* 1F60 */
    volatile U_VPC_DEBUG_9          VPC_DEBUG_9          ; /* 1F64 */
    volatile U_VPC_DEBUG_10         VPC_DEBUG_10         ; /* 1F68 */
    volatile U_VPC_DEBUG_11         VPC_DEBUG_11         ; /* 1F6C */
    volatile U_VPC_DEBUG_12         VPC_DEBUG_12         ; /* 1F70 */
    volatile U_VPC_DEBUG_13         VPC_DEBUG_13         ; /* 1F74 */
    volatile U_VPC_DEBUG_14         VPC_DEBUG_14         ; /* 1F78 */
    volatile U_VPC_DEBUG_15         VPC_DEBUG_15         ; /* 1F7C */

} S_vpc_cvdr_reg_nmanager_REGS_TYPE;

/* Declare the struct pointor of the module vpc_cvdr_reg_nmanager */
extern volatile S_vpc_cvdr_reg_nmanager_REGS_TYPE *gopvpc_cvdr_reg_nmanagerAllReg;

/* Declare the functions that set the member value */
int iSetVPC_CVDR_CFG_max_axiwrite_id(unsigned int umax_axiwrite_id);
int iSetVPC_CVDR_CFG_max_axiread_id(unsigned int umax_axiread_id);
int iSetVPC_CVDR_CFG_du_threshold_reached(unsigned int udu_threshold_reached);
int iSetVPC_CVDR_CFG_axiwrite_du_threshold(unsigned int uaxiwrite_du_threshold);
int iSetVPC_CVDR_DEBUG_EN_rd_peak_en(unsigned int urd_peak_en);
int iSetVPC_CVDR_DEBUG_EN_wr_peak_en(unsigned int uwr_peak_en);
int iSetVPC_CVDR_DEBUG_rd_peak(unsigned int urd_peak);
int iSetVPC_CVDR_DEBUG_wr_peak(unsigned int uwr_peak);
int iSetVPC_CVDR_WR_QOS_CFG_wr_qos_sr(unsigned int uwr_qos_sr);
int iSetVPC_CVDR_WR_QOS_CFG_wr_qos_max(unsigned int uwr_qos_max);
int iSetVPC_CVDR_WR_QOS_CFG_wr_qos_min(unsigned int uwr_qos_min);
int iSetVPC_CVDR_WR_QOS_CFG_wr_qos_threshold_11_start(unsigned int uwr_qos_threshold_11_start);
int iSetVPC_CVDR_WR_QOS_CFG_wr_qos_threshold_11_stop(unsigned int uwr_qos_threshold_11_stop);
int iSetVPC_CVDR_WR_QOS_CFG_wr_qos_threshold_10_start(unsigned int uwr_qos_threshold_10_start);
int iSetVPC_CVDR_WR_QOS_CFG_wr_qos_threshold_10_stop(unsigned int uwr_qos_threshold_10_stop);
int iSetVPC_CVDR_WR_QOS_CFG_wr_qos_threshold_01_start(unsigned int uwr_qos_threshold_01_start);
int iSetVPC_CVDR_WR_QOS_CFG_wr_qos_threshold_01_stop(unsigned int uwr_qos_threshold_01_stop);
int iSetVPC_CVDR_RD_QOS_CFG_rd_qos_sr(unsigned int urd_qos_sr);
int iSetVPC_CVDR_RD_QOS_CFG_rd_qos_max(unsigned int urd_qos_max);
int iSetVPC_CVDR_RD_QOS_CFG_rd_qos_min(unsigned int urd_qos_min);
int iSetVPC_CVDR_RD_QOS_CFG_rd_qos_threshold_11_start(unsigned int urd_qos_threshold_11_start);
int iSetVPC_CVDR_RD_QOS_CFG_rd_qos_threshold_11_stop(unsigned int urd_qos_threshold_11_stop);
int iSetVPC_CVDR_RD_QOS_CFG_rd_qos_threshold_10_start(unsigned int urd_qos_threshold_10_start);
int iSetVPC_CVDR_RD_QOS_CFG_rd_qos_threshold_10_stop(unsigned int urd_qos_threshold_10_stop);
int iSetVPC_CVDR_RD_QOS_CFG_rd_qos_threshold_01_start(unsigned int urd_qos_threshold_01_start);
int iSetVPC_CVDR_RD_QOS_CFG_rd_qos_threshold_01_stop(unsigned int urd_qos_threshold_01_stop);
int iSetVPC_FORCE_CLK_force_cfg_clk_on(unsigned int uforce_cfg_clk_on);
int iSetVPC_FORCE_CLK_force_du_wr_clk_on(unsigned int uforce_du_wr_clk_on);
int iSetVPC_FORCE_CLK_force_du_rd_clk_on(unsigned int uforce_du_rd_clk_on);
int iSetVPC_FORCE_CLK_force_axi_wr_clk_on(unsigned int uforce_axi_wr_clk_on);
int iSetVPC_FORCE_CLK_force_axi_rd_clk_on(unsigned int uforce_axi_rd_clk_on);
int iSetVPC_FORCE_CLK_force_nrwr_clk_on(unsigned int uforce_nrwr_clk_on);
int iSetVPC_FORCE_CLK_force_nrrd_clk_on(unsigned int uforce_nrrd_clk_on);
int iSetVPC_FORCE_CLK_force_vpwr_clk_on(unsigned int uforce_vpwr_clk_on);
int iSetVPC_FORCE_CLK_force_vprd_clk_on(unsigned int uforce_vprd_clk_on);
int iSetVPC_OTHER_RO_other_ro(unsigned int uother_ro);
int iSetVPC_OTHER_RW_other_rw(unsigned int uother_rw);
int iSetVPC_VP_WR_CFG_0_vpwr_last_page_0(unsigned int uvpwr_last_page_0);
int iSetVPC_VP_WR_CFG_0_vpwr_pixel_expansion_0(unsigned int uvpwr_pixel_expansion_0);
int iSetVPC_VP_WR_CFG_0_vpwr_pixel_format_0(unsigned int uvpwr_pixel_format_0);
int iSetVPC_VP_WR_AXI_FS_0_vpwr_address_frame_start_0(unsigned int uvpwr_address_frame_start_0);
int iSetVPC_VP_WR_AXI_LINE_0_vpwr_line_wrap_0(unsigned int uvpwr_line_wrap_0);
int iSetVPC_VP_WR_AXI_LINE_0_vpwr_line_stride_0(unsigned int uvpwr_line_stride_0);
int iSetVPC_VP_WR_IF_CFG_0_vpwr_prefetch_bypass_0(unsigned int uvpwr_prefetch_bypass_0);
int iSetVPC_VP_WR_IF_CFG_0_vp_wr_stop_0(unsigned int uvp_wr_stop_0);
int iSetVPC_VP_WR_IF_CFG_0_vp_wr_stop_ok_0(unsigned int uvp_wr_stop_ok_0);
int iSetVPC_VP_WR_IF_CFG_0_vp_wr_stop_enable_pressure_0(unsigned int uvp_wr_stop_enable_pressure_0);
int iSetVPC_VP_WR_IF_CFG_0_vp_wr_stop_enable_flux_ctrl_0(unsigned int uvp_wr_stop_enable_flux_ctrl_0);
int iSetVPC_VP_WR_IF_CFG_0_vp_wr_stop_enable_du_threshold_reached_0(unsigned int uvp_wr_stop_enable_du_threshold_reached_0);
int iSetVPC_VP_WR_CFG_1_vpwr_last_page_1(unsigned int uvpwr_last_page_1);
int iSetVPC_VP_WR_CFG_1_vpwr_pixel_expansion_1(unsigned int uvpwr_pixel_expansion_1);
int iSetVPC_VP_WR_CFG_1_vpwr_pixel_format_1(unsigned int uvpwr_pixel_format_1);
int iSetVPC_VP_WR_AXI_FS_1_vpwr_address_frame_start_1(unsigned int uvpwr_address_frame_start_1);
int iSetVPC_VP_WR_AXI_LINE_1_vpwr_line_wrap_1(unsigned int uvpwr_line_wrap_1);
int iSetVPC_VP_WR_AXI_LINE_1_vpwr_line_stride_1(unsigned int uvpwr_line_stride_1);
int iSetVPC_VP_WR_IF_CFG_1_vpwr_prefetch_bypass_1(unsigned int uvpwr_prefetch_bypass_1);
int iSetVPC_VP_WR_IF_CFG_1_vp_wr_stop_1(unsigned int uvp_wr_stop_1);
int iSetVPC_VP_WR_IF_CFG_1_vp_wr_stop_ok_1(unsigned int uvp_wr_stop_ok_1);
int iSetVPC_VP_WR_IF_CFG_1_vp_wr_stop_enable_pressure_1(unsigned int uvp_wr_stop_enable_pressure_1);
int iSetVPC_VP_WR_IF_CFG_1_vp_wr_stop_enable_flux_ctrl_1(unsigned int uvp_wr_stop_enable_flux_ctrl_1);
int iSetVPC_VP_WR_IF_CFG_1_vp_wr_stop_enable_du_threshold_reached_1(unsigned int uvp_wr_stop_enable_du_threshold_reached_1);
int iSetVPC_VP_WR_CFG_2_vpwr_last_page_2(unsigned int uvpwr_last_page_2);
int iSetVPC_VP_WR_CFG_2_vpwr_pixel_expansion_2(unsigned int uvpwr_pixel_expansion_2);
int iSetVPC_VP_WR_CFG_2_vpwr_pixel_format_2(unsigned int uvpwr_pixel_format_2);
int iSetVPC_VP_WR_AXI_FS_2_vpwr_address_frame_start_2(unsigned int uvpwr_address_frame_start_2);
int iSetVPC_VP_WR_AXI_LINE_2_vpwr_line_wrap_2(unsigned int uvpwr_line_wrap_2);
int iSetVPC_VP_WR_AXI_LINE_2_vpwr_line_stride_2(unsigned int uvpwr_line_stride_2);
int iSetVPC_VP_WR_IF_CFG_2_vpwr_prefetch_bypass_2(unsigned int uvpwr_prefetch_bypass_2);
int iSetVPC_VP_WR_IF_CFG_2_vp_wr_stop_2(unsigned int uvp_wr_stop_2);
int iSetVPC_VP_WR_IF_CFG_2_vp_wr_stop_ok_2(unsigned int uvp_wr_stop_ok_2);
int iSetVPC_VP_WR_IF_CFG_2_vp_wr_stop_enable_pressure_2(unsigned int uvp_wr_stop_enable_pressure_2);
int iSetVPC_VP_WR_IF_CFG_2_vp_wr_stop_enable_flux_ctrl_2(unsigned int uvp_wr_stop_enable_flux_ctrl_2);
int iSetVPC_VP_WR_IF_CFG_2_vp_wr_stop_enable_du_threshold_reached_2(unsigned int uvp_wr_stop_enable_du_threshold_reached_2);
int iSetVPC_VP_WR_CFG_3_vpwr_last_page_3(unsigned int uvpwr_last_page_3);
int iSetVPC_VP_WR_CFG_3_vpwr_pixel_expansion_3(unsigned int uvpwr_pixel_expansion_3);
int iSetVPC_VP_WR_CFG_3_vpwr_pixel_format_3(unsigned int uvpwr_pixel_format_3);
int iSetVPC_VP_WR_AXI_FS_3_vpwr_address_frame_start_3(unsigned int uvpwr_address_frame_start_3);
int iSetVPC_VP_WR_AXI_LINE_3_vpwr_line_wrap_3(unsigned int uvpwr_line_wrap_3);
int iSetVPC_VP_WR_AXI_LINE_3_vpwr_line_stride_3(unsigned int uvpwr_line_stride_3);
int iSetVPC_VP_WR_IF_CFG_3_vpwr_prefetch_bypass_3(unsigned int uvpwr_prefetch_bypass_3);
int iSetVPC_VP_WR_IF_CFG_3_vp_wr_stop_3(unsigned int uvp_wr_stop_3);
int iSetVPC_VP_WR_IF_CFG_3_vp_wr_stop_ok_3(unsigned int uvp_wr_stop_ok_3);
int iSetVPC_VP_WR_IF_CFG_3_vp_wr_stop_enable_pressure_3(unsigned int uvp_wr_stop_enable_pressure_3);
int iSetVPC_VP_WR_IF_CFG_3_vp_wr_stop_enable_flux_ctrl_3(unsigned int uvp_wr_stop_enable_flux_ctrl_3);
int iSetVPC_VP_WR_IF_CFG_3_vp_wr_stop_enable_du_threshold_reached_3(unsigned int uvp_wr_stop_enable_du_threshold_reached_3);
int iSetVPC_VP_WR_CFG_4_vpwr_last_page_4(unsigned int uvpwr_last_page_4);
int iSetVPC_VP_WR_CFG_4_vpwr_pixel_expansion_4(unsigned int uvpwr_pixel_expansion_4);
int iSetVPC_VP_WR_CFG_4_vpwr_pixel_format_4(unsigned int uvpwr_pixel_format_4);
int iSetVPC_VP_WR_AXI_FS_4_vpwr_address_frame_start_4(unsigned int uvpwr_address_frame_start_4);
int iSetVPC_VP_WR_AXI_LINE_4_vpwr_line_wrap_4(unsigned int uvpwr_line_wrap_4);
int iSetVPC_VP_WR_AXI_LINE_4_vpwr_line_stride_4(unsigned int uvpwr_line_stride_4);
int iSetVPC_VP_WR_IF_CFG_4_vpwr_prefetch_bypass_4(unsigned int uvpwr_prefetch_bypass_4);
int iSetVPC_VP_WR_IF_CFG_4_vp_wr_stop_4(unsigned int uvp_wr_stop_4);
int iSetVPC_VP_WR_IF_CFG_4_vp_wr_stop_ok_4(unsigned int uvp_wr_stop_ok_4);
int iSetVPC_VP_WR_IF_CFG_4_vp_wr_stop_enable_pressure_4(unsigned int uvp_wr_stop_enable_pressure_4);
int iSetVPC_VP_WR_IF_CFG_4_vp_wr_stop_enable_flux_ctrl_4(unsigned int uvp_wr_stop_enable_flux_ctrl_4);
int iSetVPC_VP_WR_IF_CFG_4_vp_wr_stop_enable_du_threshold_reached_4(unsigned int uvp_wr_stop_enable_du_threshold_reached_4);
int iSetVPC_LIMITER_VP_WR_0_vpwr_access_limiter_reload_0(unsigned int uvpwr_access_limiter_reload_0);
int iSetVPC_LIMITER_VP_WR_0_vpwr_access_limiter_3_0(unsigned int uvpwr_access_limiter_3_0);
int iSetVPC_LIMITER_VP_WR_0_vpwr_access_limiter_2_0(unsigned int uvpwr_access_limiter_2_0);
int iSetVPC_LIMITER_VP_WR_0_vpwr_access_limiter_1_0(unsigned int uvpwr_access_limiter_1_0);
int iSetVPC_LIMITER_VP_WR_0_vpwr_access_limiter_0_0(unsigned int uvpwr_access_limiter_0_0);
int iSetVPC_LIMITER_VP_WR_1_vpwr_access_limiter_reload_1(unsigned int uvpwr_access_limiter_reload_1);
int iSetVPC_LIMITER_VP_WR_1_vpwr_access_limiter_3_1(unsigned int uvpwr_access_limiter_3_1);
int iSetVPC_LIMITER_VP_WR_1_vpwr_access_limiter_2_1(unsigned int uvpwr_access_limiter_2_1);
int iSetVPC_LIMITER_VP_WR_1_vpwr_access_limiter_1_1(unsigned int uvpwr_access_limiter_1_1);
int iSetVPC_LIMITER_VP_WR_1_vpwr_access_limiter_0_1(unsigned int uvpwr_access_limiter_0_1);
int iSetVPC_LIMITER_VP_WR_2_vpwr_access_limiter_reload_2(unsigned int uvpwr_access_limiter_reload_2);
int iSetVPC_LIMITER_VP_WR_2_vpwr_access_limiter_3_2(unsigned int uvpwr_access_limiter_3_2);
int iSetVPC_LIMITER_VP_WR_2_vpwr_access_limiter_2_2(unsigned int uvpwr_access_limiter_2_2);
int iSetVPC_LIMITER_VP_WR_2_vpwr_access_limiter_1_2(unsigned int uvpwr_access_limiter_1_2);
int iSetVPC_LIMITER_VP_WR_2_vpwr_access_limiter_0_2(unsigned int uvpwr_access_limiter_0_2);
int iSetVPC_LIMITER_VP_WR_3_vpwr_access_limiter_reload_3(unsigned int uvpwr_access_limiter_reload_3);
int iSetVPC_LIMITER_VP_WR_3_vpwr_access_limiter_3_3(unsigned int uvpwr_access_limiter_3_3);
int iSetVPC_LIMITER_VP_WR_3_vpwr_access_limiter_2_3(unsigned int uvpwr_access_limiter_2_3);
int iSetVPC_LIMITER_VP_WR_3_vpwr_access_limiter_1_3(unsigned int uvpwr_access_limiter_1_3);
int iSetVPC_LIMITER_VP_WR_3_vpwr_access_limiter_0_3(unsigned int uvpwr_access_limiter_0_3);
int iSetVPC_LIMITER_VP_WR_4_vpwr_access_limiter_reload_4(unsigned int uvpwr_access_limiter_reload_4);
int iSetVPC_LIMITER_VP_WR_4_vpwr_access_limiter_3_4(unsigned int uvpwr_access_limiter_3_4);
int iSetVPC_LIMITER_VP_WR_4_vpwr_access_limiter_2_4(unsigned int uvpwr_access_limiter_2_4);
int iSetVPC_LIMITER_VP_WR_4_vpwr_access_limiter_1_4(unsigned int uvpwr_access_limiter_1_4);
int iSetVPC_LIMITER_VP_WR_4_vpwr_access_limiter_0_4(unsigned int uvpwr_access_limiter_0_4);
int iSetVPC_VP_RD_CFG_0_vprd_last_page_0(unsigned int uvprd_last_page_0);
int iSetVPC_VP_RD_CFG_0_vprd_allocated_du_0(unsigned int uvprd_allocated_du_0);
int iSetVPC_VP_RD_CFG_0_vprd_pixel_expansion_0(unsigned int uvprd_pixel_expansion_0);
int iSetVPC_VP_RD_CFG_0_vprd_pixel_format_0(unsigned int uvprd_pixel_format_0);
int iSetVPC_VP_RD_LWG_0_vprd_horizontal_blanking_0(unsigned int uvprd_horizontal_blanking_0);
int iSetVPC_VP_RD_LWG_0_vprd_line_size_0(unsigned int uvprd_line_size_0);
int iSetVPC_VP_RD_FHG_0_vprd_vertical_blanking_0(unsigned int uvprd_vertical_blanking_0);
int iSetVPC_VP_RD_FHG_0_vprd_frame_size_0(unsigned int uvprd_frame_size_0);
int iSetVPC_VP_RD_AXI_FS_0_vprd_axi_frame_start_0(unsigned int uvprd_axi_frame_start_0);
int iSetVPC_VP_RD_AXI_LINE_0_vprd_line_wrap_0(unsigned int uvprd_line_wrap_0);
int iSetVPC_VP_RD_AXI_LINE_0_vprd_line_stride_0(unsigned int uvprd_line_stride_0);
int iSetVPC_VP_RD_IF_CFG_0_vprd_prefetch_bypass_0(unsigned int uvprd_prefetch_bypass_0);
int iSetVPC_VP_RD_IF_CFG_0_vp_rd_stop_0(unsigned int uvp_rd_stop_0);
int iSetVPC_VP_RD_IF_CFG_0_vp_rd_stop_ok_0(unsigned int uvp_rd_stop_ok_0);
int iSetVPC_VP_RD_IF_CFG_0_vp_rd_stop_enable_pressure_0(unsigned int uvp_rd_stop_enable_pressure_0);
int iSetVPC_VP_RD_IF_CFG_0_vp_rd_stop_enable_flux_ctrl_0(unsigned int uvp_rd_stop_enable_flux_ctrl_0);
int iSetVPC_VP_RD_IF_CFG_0_vp_rd_stop_enable_du_threshold_reached_0(unsigned int uvp_rd_stop_enable_du_threshold_reached_0);
int iSetVPC_VP_RD_DEBUG_0_vp_rd_debug_0(unsigned int uvp_rd_debug_0);
int iSetVPC_VP_RD_CFG_1_vprd_last_page_1(unsigned int uvprd_last_page_1);
int iSetVPC_VP_RD_CFG_1_vprd_allocated_du_1(unsigned int uvprd_allocated_du_1);
int iSetVPC_VP_RD_CFG_1_vprd_pixel_expansion_1(unsigned int uvprd_pixel_expansion_1);
int iSetVPC_VP_RD_CFG_1_vprd_pixel_format_1(unsigned int uvprd_pixel_format_1);
int iSetVPC_VP_RD_LWG_1_vprd_horizontal_blanking_1(unsigned int uvprd_horizontal_blanking_1);
int iSetVPC_VP_RD_LWG_1_vprd_line_size_1(unsigned int uvprd_line_size_1);
int iSetVPC_VP_RD_FHG_1_vprd_vertical_blanking_1(unsigned int uvprd_vertical_blanking_1);
int iSetVPC_VP_RD_FHG_1_vprd_frame_size_1(unsigned int uvprd_frame_size_1);
int iSetVPC_VP_RD_AXI_FS_1_vprd_axi_frame_start_1(unsigned int uvprd_axi_frame_start_1);
int iSetVPC_VP_RD_AXI_LINE_1_vprd_line_wrap_1(unsigned int uvprd_line_wrap_1);
int iSetVPC_VP_RD_AXI_LINE_1_vprd_line_stride_1(unsigned int uvprd_line_stride_1);
int iSetVPC_VP_RD_IF_CFG_1_vprd_prefetch_bypass_1(unsigned int uvprd_prefetch_bypass_1);
int iSetVPC_VP_RD_IF_CFG_1_vp_rd_stop_1(unsigned int uvp_rd_stop_1);
int iSetVPC_VP_RD_IF_CFG_1_vp_rd_stop_ok_1(unsigned int uvp_rd_stop_ok_1);
int iSetVPC_VP_RD_IF_CFG_1_vp_rd_stop_enable_pressure_1(unsigned int uvp_rd_stop_enable_pressure_1);
int iSetVPC_VP_RD_IF_CFG_1_vp_rd_stop_enable_flux_ctrl_1(unsigned int uvp_rd_stop_enable_flux_ctrl_1);
int iSetVPC_VP_RD_IF_CFG_1_vp_rd_stop_enable_du_threshold_reached_1(unsigned int uvp_rd_stop_enable_du_threshold_reached_1);
int iSetVPC_VP_RD_DEBUG_1_vp_rd_debug_1(unsigned int uvp_rd_debug_1);
int iSetVPC_VP_RD_CFG_2_vprd_last_page_2(unsigned int uvprd_last_page_2);
int iSetVPC_VP_RD_CFG_2_vprd_allocated_du_2(unsigned int uvprd_allocated_du_2);
int iSetVPC_VP_RD_CFG_2_vprd_pixel_expansion_2(unsigned int uvprd_pixel_expansion_2);
int iSetVPC_VP_RD_CFG_2_vprd_pixel_format_2(unsigned int uvprd_pixel_format_2);
int iSetVPC_VP_RD_LWG_2_vprd_horizontal_blanking_2(unsigned int uvprd_horizontal_blanking_2);
int iSetVPC_VP_RD_LWG_2_vprd_line_size_2(unsigned int uvprd_line_size_2);
int iSetVPC_VP_RD_FHG_2_vprd_vertical_blanking_2(unsigned int uvprd_vertical_blanking_2);
int iSetVPC_VP_RD_FHG_2_vprd_frame_size_2(unsigned int uvprd_frame_size_2);
int iSetVPC_VP_RD_AXI_FS_2_vprd_axi_frame_start_2(unsigned int uvprd_axi_frame_start_2);
int iSetVPC_VP_RD_AXI_LINE_2_vprd_line_wrap_2(unsigned int uvprd_line_wrap_2);
int iSetVPC_VP_RD_AXI_LINE_2_vprd_line_stride_2(unsigned int uvprd_line_stride_2);
int iSetVPC_VP_RD_IF_CFG_2_vprd_prefetch_bypass_2(unsigned int uvprd_prefetch_bypass_2);
int iSetVPC_VP_RD_IF_CFG_2_vp_rd_stop_2(unsigned int uvp_rd_stop_2);
int iSetVPC_VP_RD_IF_CFG_2_vp_rd_stop_ok_2(unsigned int uvp_rd_stop_ok_2);
int iSetVPC_VP_RD_IF_CFG_2_vp_rd_stop_enable_pressure_2(unsigned int uvp_rd_stop_enable_pressure_2);
int iSetVPC_VP_RD_IF_CFG_2_vp_rd_stop_enable_flux_ctrl_2(unsigned int uvp_rd_stop_enable_flux_ctrl_2);
int iSetVPC_VP_RD_IF_CFG_2_vp_rd_stop_enable_du_threshold_reached_2(unsigned int uvp_rd_stop_enable_du_threshold_reached_2);
int iSetVPC_VP_RD_DEBUG_2_vp_rd_debug_2(unsigned int uvp_rd_debug_2);
int iSetVPC_LIMITER_VP_RD_0_vprd_access_limiter_reload_0(unsigned int uvprd_access_limiter_reload_0);
int iSetVPC_LIMITER_VP_RD_0_vprd_access_limiter_3_0(unsigned int uvprd_access_limiter_3_0);
int iSetVPC_LIMITER_VP_RD_0_vprd_access_limiter_2_0(unsigned int uvprd_access_limiter_2_0);
int iSetVPC_LIMITER_VP_RD_0_vprd_access_limiter_1_0(unsigned int uvprd_access_limiter_1_0);
int iSetVPC_LIMITER_VP_RD_0_vprd_access_limiter_0_0(unsigned int uvprd_access_limiter_0_0);
int iSetVPC_LIMITER_VP_RD_1_vprd_access_limiter_reload_1(unsigned int uvprd_access_limiter_reload_1);
int iSetVPC_LIMITER_VP_RD_1_vprd_access_limiter_3_1(unsigned int uvprd_access_limiter_3_1);
int iSetVPC_LIMITER_VP_RD_1_vprd_access_limiter_2_1(unsigned int uvprd_access_limiter_2_1);
int iSetVPC_LIMITER_VP_RD_1_vprd_access_limiter_1_1(unsigned int uvprd_access_limiter_1_1);
int iSetVPC_LIMITER_VP_RD_1_vprd_access_limiter_0_1(unsigned int uvprd_access_limiter_0_1);
int iSetVPC_LIMITER_VP_RD_2_vprd_access_limiter_reload_2(unsigned int uvprd_access_limiter_reload_2);
int iSetVPC_LIMITER_VP_RD_2_vprd_access_limiter_3_2(unsigned int uvprd_access_limiter_3_2);
int iSetVPC_LIMITER_VP_RD_2_vprd_access_limiter_2_2(unsigned int uvprd_access_limiter_2_2);
int iSetVPC_LIMITER_VP_RD_2_vprd_access_limiter_1_2(unsigned int uvprd_access_limiter_1_2);
int iSetVPC_LIMITER_VP_RD_2_vprd_access_limiter_0_2(unsigned int uvprd_access_limiter_0_2);
int iSetVPC_SPARE_0_spare_0(unsigned int uspare_0);
int iSetVPC_SPARE_1_spare_1(unsigned int uspare_1);
int iSetVPC_SPARE_2_spare_2(unsigned int uspare_2);
int iSetVPC_SPARE_3_spare_3(unsigned int uspare_3);
int iSetVPC_VP_WR_DEBUG_0_vp_wr_debug_0(unsigned int uvp_wr_debug_0);
int iSetVPC_VP_WR_DEBUG_1_vp_wr_debug_1(unsigned int uvp_wr_debug_1);
int iSetVPC_VP_WR_DEBUG_2_vp_wr_debug_2(unsigned int uvp_wr_debug_2);
int iSetVPC_VP_WR_DEBUG_3_vp_wr_debug_3(unsigned int uvp_wr_debug_3);
int iSetVPC_VP_WR_DEBUG_4_vp_wr_debug_4(unsigned int uvp_wr_debug_4);
int iSetVPC_DEBUG_0_debug_0(unsigned int udebug_0);
int iSetVPC_DEBUG_1_debug_1(unsigned int udebug_1);
int iSetVPC_DEBUG_2_debug_2(unsigned int udebug_2);
int iSetVPC_DEBUG_3_debug_3(unsigned int udebug_3);
int iSetVPC_DEBUG_4_debug_4(unsigned int udebug_4);
int iSetVPC_DEBUG_5_debug_5(unsigned int udebug_5);
int iSetVPC_DEBUG_6_debug_6(unsigned int udebug_6);
int iSetVPC_DEBUG_7_debug_7(unsigned int udebug_7);
int iSetVPC_DEBUG_8_debug_8(unsigned int udebug_8);
int iSetVPC_DEBUG_9_debug_9(unsigned int udebug_9);
int iSetVPC_DEBUG_10_debug_10(unsigned int udebug_10);
int iSetVPC_DEBUG_11_debug_11(unsigned int udebug_11);
int iSetVPC_DEBUG_12_debug_12(unsigned int udebug_12);
int iSetVPC_DEBUG_13_debug_13(unsigned int udebug_13);
int iSetVPC_DEBUG_14_debug_14(unsigned int udebug_14);
int iSetVPC_DEBUG_15_debug_15(unsigned int udebug_15);

#endif // __VPC_CVDR_REG_NMANAGER_C_UNION_DEFINE_H__
